PADDLE(10.6) PADDLE(10.6)
NAME
paddle - pal description language
DESCRIPTION
Paddle is a description language for detailing the fuse for-
mat of programmable devices. Paddle is used by xpal(10.1)
to create the fuse map that urom(10.1) and friends want. It
is also used by xpart(10.1).
Paddle has an underlying model of arrays of fuses. This
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(200,-208) "." ljust above at (208,-208) "." ljust above at
(216,-208) "output node" center below at (208,-320) The
input to an and/or array is a set of nodes; the output is
also a set of nodes. A node can be externally visible (such
as a pin) or it may be an internal node. The buffered or
inverted version of a node is called a "line". The inter-
section of a line with the input term of the OR is con-
trolled by a fuse. The collection of fuses over a set of
input and output nodes is called an array.
It is possible that a device may have multiple and/or
arrays; examples of such devices include the Advanced Micro
Devices Mach parts, the Cypress 7C361 finite state machine
controller and the Signetics Macrologic (PLS 501, 601 and
701) parts. Therefore, every array declaration must be fol-
lowed by a symbolic name. This helps xpal and xpart to give
useful error messages. Also, each array must have an "off-
set" declaration. This permits the array to be placed any-
where in the fuse space. Next, the declaration of input and
output nodes must be given. Note that in most programmable
logic devices, input lines come in both complement and idem-
potent flavors and are provided courtesy of the buffer on
the input pin. Paddle therefore has a declaration that
declares that a given set of nodes are doubled, either the
complement or idempotent line first.
Page 1 Plan 9 (printed 12/21/24)
PADDLE(10.6) PADDLE(10.6)
Fuse arrays are used for declaring special fuses that some
programmable parts offer. For example, the 22V10 has fuses
that set the polarity of the output pin, whether the output
is latched or combinatorial and so forth. These fuses are
not organized in an and/or array and so paddle just permits
a one-to-one mapping between artificial pin (external node)
numbers and fuse numbers. permits multiple fuse arrays pro-
vided they are given unique names. Each definition begins
by defining the name of the part along with possible syn-
onyms. This is followed by (1) an array declaration (2) a
fuse block definition (3) a type declaration (the .tt line)
and lastly, a (4) pins declaration. The array declaration
permits declaration of input and output pins to the array.
The use of the complement keyword create 2 input lines for a
given pin. The general form of a pin declaration is
pin:terms=fuse, where terms is the maximum number of terms
for the pin and fuse is the optional fuse number.
EXAMPLES
Here is part of the declaration of a 20L10:
20L10=NS20L10=AM20L10 {
package "DIP24"
declare {
internal {
output enables { 114..123 }
}
external {
inputs { 1..13 }
inverted outputs { 14..23 }
ground { 12 }
supply { 24 }
}
}
array and/or {
inputs complement+ {
2, 1,
.
.
.
11, 13
}
outputs {
123:1,
23:3,
.
.
.
}
}
}
Page 2 Plan 9 (printed 12/21/24)
PADDLE(10.6) PADDLE(10.6)
SEE ALSO
xpal(10.1)
FILES
/sys/lib/cda/library.paddle
Page 3 Plan 9 (printed 12/21/24)